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Design through Verilog HDL /

Padmanabhan, T. R.

Design through Verilog HDL / T.R. Padmanabhan, B. Bala Tripura Sundari. - Piscataway, NJ : Hoboken, NJ : IEEE Press ; Wiley-Interscience, c2004. - xiii, 455 p. : ill., digras. ; 25 cm.

Includes index and bibliographical references (p. 449-450).

0471441481 (cloth) 9812531319

2003057671


Verilog (Computer hardware description language)
EEE--System analysis.

TK7885.7 / .P37 2004

621.392 / P136d


Last Updated Oct 16, 2019.
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