TY  - BOOK
AU  - Padmanabhan,T.R.
AU  - Bala Tripura Sundari,B.
TI  - Design through Verilog HDL
SN  - 0471441481 (cloth)
AV  - TK7885.7 .P37 2004
U1  - 621.392 22
PY  - 2004///
CY  - Piscataway, NJ, Hoboken, NJ
PB  - IEEE Press, Wiley-Interscience
KW  - Verilog (Computer hardware description language)
KW  - EEE
KW  - System analysis
N1  - Includes index and bibliographical references (p. 449-450).
UR  - http://www.loc.gov/catdir/description/wiley039/2003057671.html
ER  -