000 00815nam a2200229 4500
003 BD-DhGUBL
005 20250901093511.0
008 250901s2012 njua|||| |||| 001 0 eng d
020 _a9781118011034 (Print)
020 _a9781118309728 ( Online)
040 _aBD-DhGUBL
_cBD-DhGUBL
_dBD-DhGUBL
082 _223
_a006.22
100 _aChu, Pong P.
245 _aEmbedded SoPC Design with Nios II Processor and Verilog Examples /
_cPong P. Chu
260 _aHoboken, New Jersey :
_bJohn Wiley & Sons,
_cc2012.
300 _axxxiii, 747p, :
_bill.
504 _aIncludes bibliographical references and index
650 _aEmbedded computer systems.
650 _aField programmable gate arrays
856 _uhttps://onlinelibrary.wiley.com/doi/pdfdirect/10.1002/9781118309728?download=true
942 _2ddc
_cBK
999 _c5112
_d5112