000 00839nam a2200229 4500
003 BD-DhGUBL
005 20251112121344.0
008 251112s2014 si a b 001 0 eng d
020 _a9781118659182
020 _a9781118659199
040 _aBD-DhGUBL
_cBD-DhGUBL
_dBD-DhGUBL
082 0 4 _a621.39
_223
100 1 _aJeong, Hong
_eauthor.
245 1 0 _aArchitectures for computer vision :
_bfrom algorithm to chip with Verilog /
_cHong Jeong.
260 _aSingapore :
_bJohn Wiley & Sons,
_cc 2014.
300 _axv, 450 p. :
_bill. :
504 _aIncludes bibliographical references and index.
650 0 _aVerilog (Computer hardware description language)
650 0 _aComputer vision.
856 _uhttps://onlinelibrary.wiley.com/doi/pdfdirect/10.1002/9781118659199?download=true
_yClick here to download
942 _2ddc
_cEBK
999 _c5402
_d5402